Inspired by ancient wisdom. Driven by modern innovation.

Learn VLSI designfrom basicto advance.

Digital & analog VLSI training from industry & Acdemia experts — semiconductor fundamentals, CMOS technology, RTL to tapeout, and analog IC design, now on your schedule.

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Free to enroll
Self-paced video lessons
Industry practitioners

Now playing

SOC Operation

Why Kanada

Ancient thinkers imagined a world built from indivisible particles.Today, engineers place billions of transistors on a sliver of silicon.We teach you how.

The learning path

Five tracks.One path to silicon.

The curriculum follows the way chips are actually built — from device physics to a design that's ready for the fab.

Semiconductor Fundamentals

Band theory, PN junctions and MOSFET physics — the ground truth every design decision rests on.

Device physics
PN junctions
MOSFETs

CMOS Technology

From the inverter up: logic styles, the fabrication flow, scaling, and the power–performance–area trade-offs.

CMOS logic
Fabrication
PPA

RTL Design & Verification

Write synthesizable Verilog and SystemVerilog, then prove it works with testbenches, assertions and coverage.

Verilog
SystemVerilog
Testbenches

Physical Design to Tapeout

Synthesis, floorplanning, placement, clock trees, routing, timing closure and signoff — all the way to GDSII.

STA
Place & route
DRC / LVS

Analog IC Design

Current mirrors, amplifiers and data converters — designing where signals are continuous and every millivolt counts.

Op-amps
Data converters
Layout

Start anywhere

Pick a course and press play.

Every course is free to enroll.

Explore the catalog

CMOS
FinFET
Verilog
SystemVerilog
UVM
Static timing analysis
Floorplanning
Clock tree synthesis
DRC / LVS
Op-amps
PLLs
Data converters
Layout
Low-power design

Published courses: 3
Weeks of training: 20
Instructors: 10+
Average rating: 5.0★

Featured courses

Start learningtoday.

VLSI Foundations — Free 8-Week Program

Our free, open 8-week common program. Build the semiconductor, CMOS and digital fundamentals every VLSI engineer needs — from MOS physics to Verilog & FPGA. The ideal starting point before the Digital and Analog design tracks.

Digital VLSI Design

The complete digital design track (Weeks 9–20): static & alternative logic, layout, delay modelling, power, sequential design, RTL-to-GDSII physical design, signoff, DFT and a final project reviewed by an external expert.

Analog VLSI Design

The complete analog design track (Weeks 9–20): MOS & differential amplifiers, op-amps, bandgap references, memory circuits, analog layout, noise & reliability, mixed-signal design and a final analog IC project.

Dr. Anshul Verma★ 5.0

The platform

Built for deep work,not doom-scrolling.

A focused learning environment: stream lessons, pick up exactly where you stopped, and see how far you've come.

Lessons that remember where you left off

Seek freely through lesson videos — your position is saved, so the next session starts right where the last one ended.

08:42

14:57

MOSFET I–V characteristics
SOC Operation
Static & dynamic power
Noise margins

Progress you can see

Every completed lesson moves the bar. Your dashboard shows each course at a glance.

Led by practitioners

Courses are built by engineers who work in the industry, structured into sections and lessons you can preview before enrolling.

Start today — it's free

Your first chip startswith a single lesson.

Create an account in seconds, enroll in any course, and learn at your own pace.

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People

Our core team

Industry practitioners, researchers and mentors guiding you from fundamentals to tapeout.

Sulekha Dwivedi
Director — Management
Dr. Anshul Verma
Director — Analog Design
Er. Deepak Mishra
Director — Digital Design
Er. Ronit Mishra
Industry Expert — Memory Design
Tejal Patel
Industry Expert — Physical Design
Dr. Vibhu Srivastava
Mentor — Device Fabrication
Dr. Pritesh
Mentor — Analog Design
Dr. Rahul Mishra
Mentor — Digital Design
Dr. Abhi
Mentor — Digital Design (ML)
PK Dwivedi
Mentor — Data Analytics
Priyam Shukla
Junior Manager